Debugged pipeline register and state update. All test cases ok.timing_fix

2 files changed, 29 insertions, 10 deletions

diff --git a/src/rtl/chacha_core.v b/src/rtl/chacha_core.v
index d68f783..32f37f5 100644
--- a/src/rtl/chacha_core.v
+++ b/src/rtl/chacha_core.v
@@ -80,9 +80,10 @@ module chacha_core(
 
   localparam CTRL_IDLE     = 3'h0;
   localparam CTRL_INIT     = 3'h1;
-  localparam CTRL_ROUNDS   = 3'h2;
-  localparam CTRL_FINALIZE = 3'h3;
-  localparam CTRL_DONE     = 3'h4;
+  localparam CTRL_ROUNDS0  = 3'h2;
+  localparam CTRL_ROUNDS1  = 3'h3;
+  localparam CTRL_FINALIZE = 3'h4;
+  localparam CTRL_DONE     = 3'h5;
 
 
   //----------------------------------------------------------------
@@ -390,7 +391,6 @@ module chacha_core(
 
       for (i = 0 ; i < 16 ; i = i + 1)
         state_new[i] = 32'h0;
-      state_we = 0;
 
       qr0_a = 32'h0;
       qr0_b = 32'h0;
@@ -413,12 +413,10 @@ module chacha_core(
         begin
           for (i = 0 ; i < 16 ; i = i + 1)
             state_new[i] = init_state_word[i];
-          state_we   = 1;
         end // if (init_state)
 
       if (update_state)
         begin
-          state_we = 1;
           case (qr_ctr_reg)
             QR0:
               begin
@@ -621,6 +619,7 @@ module chacha_core(
     begin : chacha_ctrl_fsm
       init_state         = 0;
       update_state       = 0;
+      state_we           = 0;
       update_output      = 0;
       qr_ctr_inc         = 0;
       qr_ctr_rst         = 0;
@@ -651,16 +650,26 @@ module chacha_core(
         CTRL_INIT:
           begin
             init_state      = 1;
+            state_we        = 1;
             qr_ctr_rst      = 1;
             dr_ctr_rst      = 1;
-            chacha_ctrl_new = CTRL_ROUNDS;
+            chacha_ctrl_new = CTRL_ROUNDS0;
             chacha_ctrl_we  = 1;
           end
 
-        CTRL_ROUNDS:
+        CTRL_ROUNDS0:
           begin
+            update_state    = 1;
+            chacha_ctrl_new = CTRL_ROUNDS1;
+            chacha_ctrl_we  = 1;
+          end
+
+        CTRL_ROUNDS1:
+          begin
+            state_we     = 1;
             update_state = 1;
             qr_ctr_inc   = 1;
+
             if (qr_ctr_reg == QR1)
               begin
                 dr_ctr_inc = 1;
@@ -669,6 +678,16 @@ module chacha_core(
                     chacha_ctrl_new = CTRL_FINALIZE;
                     chacha_ctrl_we  = 1;
                   end
+                else
+                  begin
+                    chacha_ctrl_new = CTRL_ROUNDS0;
+                    chacha_ctrl_we  = 1;
+                  end
+              end
+            else
+              begin
+                chacha_ctrl_new = CTRL_ROUNDS0;
+                chacha_ctrl_we  = 1;
               end
           end
 
diff --git a/src/rtl/chacha_qr.v b/src/rtl/chacha_qr.v
index 5189030..ba68d51 100644
--- a/src/rtl/chacha_qr.v
+++ b/src/rtl/chacha_qr.v
@@ -130,7 +130,7 @@ module chacha_qr(
       a0 = a + b;
       a0_new = a0;
 
-      d0 = d ^ a0;
+      d0 = d ^ a0_reg;
       d1 = {d0[15 : 0], d0[31 : 16]};
 
       c0 = c + d1;
@@ -139,7 +139,7 @@ module chacha_qr(
       b0 = b ^ c0;
       b1 = {b0[19 : 0], b0[31 : 20]};
 
-      a1 = a0 + b1;
+      a1 = a0_reg + b1;
 //      a1_new = a1;
 
       d2 = d1 ^ a1;