diff options
author | Joachim StroĢmbergson <joachim@assured.se> | 2019-02-07 14:30:01 +0100 |
---|---|---|
committer | Joachim StroĢmbergson <joachim@assured.se> | 2019-02-07 14:30:01 +0100 |
commit | de3f38a835ad9ac5ad8b6153a6b363c23641a3f8 (patch) | |
tree | d0f41bbfab2ac98ae59012d294e15bd71317491e /src/rtl/chacha_qr.v | |
parent | 447efe94126531908899a0749a21766534d78965 (diff) |
Change reset to asynch assert. This matches comment. It also matches what is used in the TRNG core where the chacha core is instantiated. Also removed reset from the pipeline registers.
Diffstat (limited to 'src/rtl/chacha_qr.v')
-rw-r--r-- | src/rtl/chacha_qr.v | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/src/rtl/chacha_qr.v b/src/rtl/chacha_qr.v index ec29c70..02fe59b 100644 --- a/src/rtl/chacha_qr.v +++ b/src/rtl/chacha_qr.v @@ -85,22 +85,14 @@ module chacha_qr( //---------------------------------------------------------------- // reg_update + // + // Pipeline registers. Does not need reset. //---------------------------------------------------------------- always @ (posedge clk) begin : reg_update - if (!reset_n) - begin - a0_reg <= 32'h0; - a1_reg <= 32'h0; - c0_reg <= 32'h0; - end - - else - begin - a0_reg <= a0_new; - a1_reg <= a1_new; - c0_reg <= c0_new; - end + a0_reg <= a0_new; + a1_reg <= a1_new; + c0_reg <= c0_new; end // reg_update |