diff options
Diffstat (limited to 'src/rtl/aes.v')
-rw-r--r-- | src/rtl/aes.v | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/src/rtl/aes.v b/src/rtl/aes.v index 4f668bc..492ba56 100644 --- a/src/rtl/aes.v +++ b/src/rtl/aes.v @@ -107,10 +107,6 @@ module aes( reg [31 : 0] key_reg [0 : 7]; reg key_we; - reg [127 : 0] result_reg; - reg valid_reg; - reg ready_reg; - //---------------------------------------------------------------- // Wires. @@ -189,16 +185,9 @@ module aes( next_reg <= 1'b0; encdec_reg <= 1'b0; keylen_reg <= 1'b0; - - result_reg <= 128'h0; - valid_reg <= 1'b0; - ready_reg <= 1'b0; end else begin - ready_reg <= core_ready; - valid_reg <= core_valid; - result_reg <= core_result; init_reg <= init_new; next_reg <= next_new; @@ -239,10 +228,10 @@ module aes( if (core_ready) begin if (address == ADDR_CTRL) - begin - init_new = write_data[CTRL_INIT_BIT]; - next_new = write_data[CTRL_NEXT_BIT]; - end + begin + init_new = write_data[CTRL_INIT_BIT]; + next_new = write_data[CTRL_NEXT_BIT]; + end if (address == ADDR_CONFIG) config_we = 1'b1; @@ -262,7 +251,7 @@ module aes( ADDR_NAME1: tmp_read_data = CORE_NAME1; ADDR_VERSION: tmp_read_data = CORE_VERSION; ADDR_CTRL: tmp_read_data = {28'h0, keylen_reg, encdec_reg, next_reg, init_reg}; - ADDR_STATUS: tmp_read_data = {30'h0, valid_reg, ready_reg}; + ADDR_STATUS: tmp_read_data = {30'h0, core_valid, core_ready}; default: begin @@ -271,7 +260,7 @@ module aes( if ((address >= ADDR_RESULT0) && (address <= ADDR_RESULT3)) if (core_ready) - tmp_read_data = result_reg[(3 - (address - ADDR_RESULT0)) * 32 +: 32]; + tmp_read_data = core_result[(3 - (address - ADDR_RESULT0)) * 32 +: 32]; end end end // addr_decoder |