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authorJoachim StroĢˆmbergson <joachim@secworks.se>2017-12-06 14:08:14 +0100
committerJoachim StroĢˆmbergson <joachim@secworks.se>2017-12-06 14:08:14 +0100
commit26a85f83022fc3b3c704f037616a398e28134f8d (patch)
treeedac1830d8986838962fab49690c2f5f654b644a /src/rtl/aes_core.v
parent3b6f569c3506e82193fd81cfb3e0049a8a61a222 (diff)
Synced AES repo. This commit fixes many nits such as: (1) Silence warnings on size of contants. (2) warning on tasks for empty arguments in tasks. (3) timescale directives not needed. It also implements API in a code-wise more compact way. Info about implementation status updated. No changes affect the functionality of the core.api_error_fix
Diffstat (limited to 'src/rtl/aes_core.v')
-rw-r--r--src/rtl/aes_core.v80
1 files changed, 37 insertions, 43 deletions
diff --git a/src/rtl/aes_core.v b/src/rtl/aes_core.v
index c43c943..d06f6ea 100644
--- a/src/rtl/aes_core.v
+++ b/src/rtl/aes_core.v
@@ -60,9 +60,9 @@ module aes_core(
//----------------------------------------------------------------
// Internal constant and parameter definitions.
//----------------------------------------------------------------
- parameter CTRL_IDLE = 2'h0;
- parameter CTRL_INIT = 2'h1;
- parameter CTRL_NEXT = 2'h2;
+ localparam CTRL_IDLE = 2'h0;
+ localparam CTRL_INIT = 2'h1;
+ localparam CTRL_NEXT = 2'h2;
//----------------------------------------------------------------
@@ -165,7 +165,7 @@ module aes_core(
);
- aes_sbox sbox(.sboxw(muxed_sboxw), .new_sboxw(new_sboxw));
+ aes_sbox sbox_inst(.sboxw(muxed_sboxw), .new_sboxw(new_sboxw));
//----------------------------------------------------------------
@@ -194,19 +194,13 @@ module aes_core(
else
begin
if (result_valid_we)
- begin
- result_valid_reg <= result_valid_new;
- end
+ result_valid_reg <= result_valid_new;
if (ready_we)
- begin
- ready_reg <= ready_new;
- end
+ ready_reg <= ready_new;
if (aes_core_ctrl_we)
- begin
- aes_core_ctrl_reg <= aes_core_ctrl_new;
- end
+ aes_core_ctrl_reg <= aes_core_ctrl_new;
end
end // reg_update
@@ -238,8 +232,8 @@ module aes_core(
//----------------------------------------------------------------
always @*
begin : encdec_mux
- enc_next = 0;
- dec_next = 0;
+ enc_next = 1'b0;
+ dec_next = 1'b0;
if (encdec)
begin
@@ -269,64 +263,64 @@ module aes_core(
//----------------------------------------------------------------
always @*
begin : aes_core_ctrl
- init_state = 0;
- ready_new = 0;
- ready_we = 0;
- result_valid_new = 0;
- result_valid_we = 0;
+ init_state = 1'b0;
+ ready_new = 1'b0;
+ ready_we = 1'b0;
+ result_valid_new = 1'b0;
+ result_valid_we = 1'b0;
aes_core_ctrl_new = CTRL_IDLE;
- aes_core_ctrl_we = 0;
+ aes_core_ctrl_we = 1'b0;
case (aes_core_ctrl_reg)
CTRL_IDLE:
begin
if (init)
begin
- init_state = 1;
- ready_new = 0;
- ready_we = 1;
- result_valid_new = 0;
- result_valid_we = 1;
+ init_state = 1'b1;
+ ready_new = 1'b0;
+ ready_we = 1'b1;
+ result_valid_new = 1'b0;
+ result_valid_we = 1'b1;
aes_core_ctrl_new = CTRL_INIT;
- aes_core_ctrl_we = 1;
+ aes_core_ctrl_we = 1'b1;
end
else if (next)
begin
- init_state = 0;
- ready_new = 0;
- ready_we = 1;
- result_valid_new = 0;
- result_valid_we = 1;
+ init_state = 1'b0;
+ ready_new = 1'b0;
+ ready_we = 1'b1;
+ result_valid_new = 1'b0;
+ result_valid_we = 1'b1;
aes_core_ctrl_new = CTRL_NEXT;
- aes_core_ctrl_we = 1;
+ aes_core_ctrl_we = 1'b1;
end
end
CTRL_INIT:
begin
- init_state = 1;
+ init_state = 1'b1;
if (key_ready)
begin
- ready_new = 1;
- ready_we = 1;
+ ready_new = 1'b1;
+ ready_we = 1'b1;
aes_core_ctrl_new = CTRL_IDLE;
- aes_core_ctrl_we = 1;
+ aes_core_ctrl_we = 1'b1;
end
end
CTRL_NEXT:
begin
- init_state = 0;
+ init_state = 1'b0;
if (muxed_ready)
begin
- ready_new = 1;
- ready_we = 1;
- result_valid_new = 1;
- result_valid_we = 1;
+ ready_new = 1'b1;
+ ready_we = 1'b1;
+ result_valid_new = 1'b1;
+ result_valid_we = 1'b1;
aes_core_ctrl_new = CTRL_IDLE;
- aes_core_ctrl_we = 1;
+ aes_core_ctrl_we = 1'b1;
end
end