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authorJoachim StroĢˆmbergson <joachim@secworks.se>2018-05-22 09:39:25 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2018-05-22 09:39:25 +0200
commitc596c2f7a29b673d85a127e2c7b03e9e52830e22 (patch)
tree8b874819020da384213318a486c5f624394abfa8
parent6baf074eda6c7d59f8bd0795d2d3e619f347d740 (diff)
Updated README with implementation results.
-rw-r--r--README.md21
1 files changed, 19 insertions, 2 deletions
diff --git a/README.md b/README.md
index 3993e6c..6ce5f4b 100644
--- a/README.md
+++ b/README.md
@@ -37,10 +37,27 @@ The key expansion does not share S-boxes with the encipher datapath, so
the total number of S-boxes is 20.
-## Performance and area comparison ##
-Number of cycles for the Cryptech old AES core:
+## Performance comparison
+Number of cycles for the old Cryptech AES core:
- AES-128 Encipher one block with key expansion: 57
Number of cycles for the Cryptech AES speed core:
- AES-128 Encipher with key expansion: 27
+
+
+## Implementation comparison
+Implementation results for Xilinx Artix7-t200.
+
+Old Cryptech AES core:
+- 2102 slices
+- 2991 regs
+- 113 MHz (8.79ns)
+
+
+Cryptec AES speed core:
+- 2019 slices
+- 2984 regs
+- 131 MHz. (7.58ns)
+
+Surprisingly, the number of slices actually decreases.